000 | 01111cam a2200313 i 4500 | ||
---|---|---|---|
008 | 150617s2015 nju b 001 0 eng | ||
010 | _a 2015015679 | ||
020 | _a9781118841099 (cloth) | ||
040 |
_aDLC _beng _cDLC _erda _dDLC |
||
042 | _apcc | ||
050 | 0 | 0 |
_aTK7885.7 _b.L523 2015 |
082 | 0 | 0 |
_a621.390285/5133 _223 |
100 | 1 | _aLi, Yamin. | |
245 | 1 | 0 |
_aComputer principles and design in Verilog HDL / _cYamin Li, Hosei University, Japan. |
264 | 1 |
_aHoboken : _bWiley, _c2015. |
|
300 |
_axxx, 542 pages ; _c25 cm |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_aunmediated _bn _2rdamedia |
||
338 |
_avolume _bnc _2rdacarrier |
||
504 | _aIncludes bibliographical references and index. | ||
650 | 0 | _aVerilog (Computer hardware description language) | |
650 | 0 |
_aComputer engineering _xData processing. |
|
776 | 0 | 8 |
_iOnline version: _aLi, Yamin. _tComputer principles and design in Verilog HDL _dHoboken : John Wiley and Sons, Inc., 2015 _z9781118841112 _w(DLC) 2015024730 |
035 | _a(IMchF)fol15751724 | ||
005 | 20240929113952.0 | ||
001 | 39031 | ||
003 | 0000000000 | ||
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_cCIR _2ddc |
||
999 |
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